Four Ways to Keep Design Verification on Track

Posted On 04 July 2018 Stephen Dyson

Design verification is a critical stage in the development of a new product, therefore it warrants significant scrutiny from the project team. This stage sits between component sign-off and design validation, and is often under considerable time pressure. Stephen Dyson, Head of Industry 4.0 at Protolabs, looks at how thorough planning and preparation can relieve some of that pressure, and reduce the risk of failing to hit verification deadlines.

As anyone involved in design verification (DV) knows, this stage in a project can be a turning point in the product development process. This is when the design ‘outputs’ (the functions and features of the product) can be confirmed as meeting the design ‘inputs’ (the product requirements specification). In other words, DV makes sure the product you’re designing is the product that’s needed.

Another ‘make or break’ aspect of DV is the opportunity it brings to assess residual risk. By this stage, steps will have been taken to identify and eliminate risks relating to the product – and DV will uncover any remaining threats, which you’ll need to judge against pre-agreed acceptance criteria.

The main outcome of DV is a clear view of whether or not the product is a viable proposition. Successful DV is the hurdle to leap before design validation can begin.

Important and urgent

It’s easy to see why everyone involved in the development of a product wants the DV stage to go smoothly. If it highlights any unmet requirements or unacceptable risks, the product could be delayed or even shelved and—in either of these scenarios—the cost implications can be serious.

In spite of its inherent importance, DV needs to be done quickly. It can’t be allowed to hold up the often immovable – and often expensive – validation stage, when the product is finally tested before launch.

Success at speed is the aim, and that means careful planning and preparation. Here are four ways to help keep DV on track.

  1. Develop a clear rationale for all your product requirements

It might seem obvious, but the requirements you’re verifying the design against need to be understood and agreed by all. As they’re central to defining the product’s purpose, they’re usually accepted very early in the development process. But they shouldn't be taken for granted: there needs to be good reason for every requirement specified. Also, being clear about how the design will be verified against each requirement—and by whom—will help create a structured, efficient verification programme.

  1. Try to anticipate new issues that could arise during DV

This will often be the first time the product is tested in quantity, and in certain conditions. So it pays to spend time thinking through, well in advance, all aspects of the DV programme, and how they might affect the product. Anticipating any resulting problems could save valuable time.

  1. Be aware of the risk of DV falling into organisational gaps

Verification activities can sometimes be divided between different departments, offices or organisations. If so, there might be a danger of miscommunication, which could lead to delays. Extra planning time to ensure everyone is clear about their respective responsibilities could save a lot more time during DV.

  1. Have an on-demand prototype resource ready to help

If your DV programme involves prototypes or short-run production – and you don't have the facilities in-house – a responsive specialist service will help you keep to critical timescales. So your preparation should include securing an outsource partner, one that can assist with high or low demand in-line with your verification needs. At Protolabs, we’re set up to meet the demands of DV activities, reacting quickly every time new prototypes are required, in any quantity.

When you’re next planning for DV, consider these four steps. Although all steps may not be applicable to your specific programme, an appreciation of what may occur will help speed your product through the development process.